Arduino Programming for Beginners Training Course

This instructor-led, live training in the Netherlands (online or on-site) is designed for engineers who want to learn how to use embedded C to program a variety of microcontrollers based on different processor architectures, including 8051, ARM CORTEX M-3, and ARM9.

This instructor-led, live training in the Netherlands (online or onsite) targets intermediate-level embedded systems engineers and AI developers aiming to deploy machine learning models on microcontrollers using TensorFlow Lite and Edge Impulse.

Upon completing this training, participants will be capable of:

• Grasping the core principles of TinyML and its advantages for edge AI applications.
• Configuring a development environment suitable for TinyML projects.
• Training, optimizing, and deploying AI models on low-power microcontrollers.
• Leveraging TensorFlow Lite and Edge Impulse to build practical TinyML solutions.
• Enhancing AI models for improved power efficiency and adherence to memory limitations.

The RISC-V ecosystem has evolved from a niche open-source instruction set architecture (ISA) into a mainstream platform gaining significant traction across edge computing, IoT, automotive, AI acceleration, and server-class processors. Industry analyses highlight a pressing talent gap: with fewer than 5,000 RISC-V chip designers worldwide, there are over 15,000 open positions in the semiconductor sector. Key hiring trends indicate that employers prioritize candidates proficient in RISC-V architecture alongside SoC design, RTL verification (UVM/SystemVerilog), AI accelerator development, Rust systems programming, confidential computing, and open-source toolchain expertise. The most rapidly growing competency areas include automotive-grade RISC-V (ISO 26262), server-class processors featuring AIA interrupt controllers and multi-core coherence, and edge AI inference NPUs. Companies such as SiFive, Qualcomm, and Western Digital are accelerating RISC-V development, increasing demand for engineers capable of bridging architecture specification, silicon implementation, firmware, and software stack development within a unified skill set.